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1 lt1506 4.5a, 500khz step-down switching regulator n constant 500khz switching frequency n easily synchronizable n operates with input as low as 4v n uses all surface mount components n inductor size reduced to 1.8 m h n saturating switch design: 0.07 w n shutdown current: 20 m a n cycle-by-cycle current limiting the lt ? 1506 is a 500khz monolithic buck mode switching regulator functionally identical to the lt1374 but optimized for lower input voltage applications. it will operate over a 4v to 15v input range compared with 5.5v to 25v for the lt1374. a 4.5a switch is included on the die along with all the necessary oscillator, control and logic circuitry. high switching frequency allows a considerable reduction in the size of external components. the topology is current mode for fast transient response and good loop stability. both fixed output voltage and adjustable parts are available. a special high speed bipolar process and new design tech- niques achieve high efficiency at high switching frequency. efficiency is maintained over a wide output current range by keeping quiescent supply current to 4ma and by utiliz- ing a supply boost capacitor to saturate the power switch. the lt1506 fits into standard 7-pin dd and fused lead so-8 packages. full cycle-by-cycle short-circuit protection and thermal shutdown are provided. standard surface mount external parts are used, including the inductor and capacitors. there is the optional function of shutdown or synchronization. a shutdown signal reduces supply current to 20 m a. synchronization allows an external logic level sig- nal to increase the internal oscillator from 580khz to 1mhz. n portable computers n battery-powered systems n battery charger n distributed power , ltc and lt are registered trademarks of linear technology corporation. load current (a) 0 efficiency (%) 90 85 80 75 70 2.0 2.5 3.0 3.5 1506 ta02 0.5 1.0 1.5 4.0 v out = 3.3v v in = 5v l = 10 m h efficiency vs load current 5v to 3.3v down converter boost lt1506-3.3 v in output 3.3v 4a input 5v 1506 ta01 c2 0.68 m f c c 1.5nf d1 mbrs330t3 c1 100 m f, 10v solid tantalum c3 10 m f to 50 m f ceramic d2 1n914 l1 5 m h v sw sense shdn open or high = on gnd v c + + features descriptio u applicatio s u typical applicatio u
2 lt1506 absolute m axi m u m ratings w ww u input voltage .......................................................... 16v boost pin above input voltage ............................. 15v shdn pin voltage ..................................................... 7v fb pin voltage (adjustable part) ............................ 3.5v fb pin current (adjustable part) ............................ 1ma sense voltage (fixed 3.3v part) ............................... 5v sync pin voltage ..................................................... 7v operating junction temperature range lt1506c ............................................... 0 c to 125 c lt1506i ........................................... C 40 c to 125 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c electrical characteristics parameter conditions min typ max units feedback voltage (adjustable) 2.39 2.42 2.45 v all conditions l 2.36 2.48 v sense voltage (fixed 3.3v) 3.25 3.3 3.35 v all conditions l 3.23 3.37 v sense pin resistance 4 6.6 9.5 k w reference voltage line regulation 4.3v v in 15v 0.01 0.03 %/ v feedback input bias current l 0.5 2 m a error amplifier voltage gain (notes 2, 8) 200 400 error amplifier transconductance d i (v c ) = 10 m a (note 8) 1500 2000 2700 m mho l 1000 3100 m mho v c pin to switch current transconductance 5.3 a/ v error amplifier source current v fb = 2.1v or v sense = 2.9v l 140 225 320 m a error amplifier sink current v fb = 2.7v or v sense = 3.7v l 140 225 320 m a v c pin switching threshold duty cycle = 0 0.9 v v c pin high clamp 2.1 v switch current limit v c open, v fb = 2.1v or v sense = 2.9v, dc 50% l 4.5 6 8.5 a slope compensation dc = 80% 0.8 a t j = 25 c, v in = 5v, v c = 1.5v, boost = v in + 5v, switch open, unless otherwise noted. package/order i n for m atio n w u u order part number order part number lt1506cr lt1506cr-3.3 lt1506cr-sync lt1506cr-3.3 sync lt1506ir lt1506ir-3.3 lt1506ir-sync lt1506ir-3.3 sync t jmax = 125 c, q ja = 30 c/w with package soldered to 0.5 square inch copper area over backside ground plane or internal power plane. q ja can vary from 20 c/w to > 40 c/w depending on mounting techniques 1506i 506i33 1506 150633 s8 part marking lt1506cs8 lt1506cs8-3.3 lt1506is8 lt1506is8-3.3 *default is the adjustable output voltage device with fb pin and shutdown function. option -3.3 replaces fb with sense pin for fixed 3.3v output applications. -sync replaces shdn with sync pin for applications requiring synchronization. consult factory for military grade parts. fb or sense* boost v in gnd v sw sync or shdn* v c r package 7-lead plastic dd pak front view tab is gnd 7 6 5 4 3 2 1 1 2 3 4 8 7 6 5 top view s8 package 8-lead plastic so v in boost gnd** v sw sync shdn v c fb or sense* q ja = 80 c/ w **with fused (gnd) ground pin connected to ground plane or large lands (note 1)
3 lt1506 electrical characteristics parameter conditions min typ max units switch on resistance (note 7) i sw = 4.5a 0.07 0.1 w l 0.13 w maximum switch duty cycle v fb = 2.1v or v sense = 2.9v 90 93 % l 86 93 % switch frequency v c set to give 50% duty cycle 460 500 540 khz l 440 560 khz switch frequency line regulation 4.3v v in 15v l 0 0.15 %/ v frequency shifting threshold on fb pin d f = 10khz l 0.8 1.0 1.3 v minimum input voltage (note 3) l 4.0 4.3 v minimum boost voltage (note 4) i sw 4.5a l 2.3 3.0 v boost current (note 5) i sw = 1a l 20 35 ma i sw = 4.5a l 90 140 ma input supply current (note 6) l 3.8 5.4 ma shutdown supply current v shdn = 0v, v sw = 0v, v c open 15 50 m a l 75 m a lockout threshold v c open l 2.3 2.38 2.46 v shutdown thresholds v c open device shutting down l 0.13 0.37 0.60 v device starting up l 0.25 0.45 0.7 v synchronization threshold l 1.5 2.2 v synchronizing range 580 1000 khz sync pin input resistance 40 k w t j = 25 c, v in = 5v, v c = 1.5v, boost = v in + 5v, switch open, unless otherwise noted. the l denotes specifications which apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: gain is measured with a v c swing equal to 200mv above the switching threshold level to 200mv below the upper clamp level. note 3: minimum input voltage is not measured directly, but is guaranteed by other tests. it is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator frequency remain constant. actual minimum input voltage to maintain a regulated output will depend on output voltage and load current. see applications information. note 4: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. note 5: boost current is the current flowing into the boost pin with the pin held 5v above input voltage. it flows only during switch on time. note 6: input supply current is the bias current drawn by the input pin with switching disabled. note 7: switch on resistance is calculated by dividing v in to v sw voltage by the forced current (4.5a). see typical performance characteristics for the graph of switch voltage at other currents. note 8: transconductance and voltage gain refer to the internal amplifier exclusive of the voltage divider. to calculate gain and transconductance refer to sense pin on fixed voltage parts. divide values shown by the ratio v out /2.42.
4 lt1506 typical perfor m a n ce characteristics uw feedback pin voltage temperature ( c) ?0 2.430 2.425 2.420 2.415 2.410 100 1506 g03 25 0 25 50 75 125 feedback voltage (v) switch peak current limit duty cycle (%) 0 switch peak current (a) 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 80 1506 g02 20 40 60 100 typical minimum lockout and shutdown thresholds shutdown pin bias current shutdown supply current junction temperature ( c) ?0 2.40 2.36 2.32 0.8 0.4 0 25 75 1506 g05 ?5 0 50 100 125 shutdown pin voltage (v) lockout start-up shutdown input voltage (v) 0 input supply current ( m a) 25 20 15 10 5 0 51015 1506 g06 v shdn = 0v shutdown supply current shutdown voltage (v) 0 input supply current ( m a) 70 60 50 40 30 20 10 0 0.1 0.2 0.3 0.4 1506 g07 v in = 10v frequency (hz) gain ( m mho) phase (deg) 3000 2500 2000 1500 1000 500 200 150 100 50 0 ?0 100 10k 100k 10m 1506 g09 1k 1m gain phase error amplifier equivalent circuit r out 200k c out 12pf v c r load = 50 w v fb 2 10 ? ) ( error amplifier transconductance error amplifier transconductance junction temperature ( c) ?0 transconductance ( m mho) 2500 2000 1500 1000 500 0 0 50 75 1506 g08 ?5 25 100 125 minimum input voltage with 3.3v output load current (ma) 1 4.1 input voltage (v) 4.3 4.5 4.7 10 100 1000 1506 g12 3.9 3.7 3.5 3.3 temperature ( c) ?0 500 400 300 200 ? ? 0 25 75 1506 g04 ?5 0 50 100 125 current ( m a) at 0.37v shutdown threshold. after shutdown, current drops to a few m a at 2.38v lockout threshold
5 lt1506 typical perfor m a n ce characteristics uw frequency foldback feedback pin voltage (v) 0 switching frequency (khz) or current ( m a) 500 400 300 200 100 0 2.0 1506 g10 0.5 1.0 1.5 2.5 switching frequency feedback pin current inductor core loss for 3.3v output inductance ( m h) 02 core loss (w) 1.0 0.1 0.01 0.001 46810 1506 g01 type 52 metglas kool m m permalloy m = 125 switching frequency temperature ( c) ?0 550 540 530 520 510 500 490 480 470 460 450 100 1506 g11 25 0 25 50 75 125 frequency (khz) boost pin current switch current (a) 0 0 boost pin current (ma) 10 20 40 30 60 50 12 3 45 1506 g14 80 70 100 90 duty cycle = 100% maximum load current at v out = 3.3v input voltage (v) 4 4.0 4.2 4.4 12 1506 g13 3.8 3.6 610 814 3.4 3.2 3.0 load current (a) l= 10 m h l= 5 m h l= 3 m h l= 1.8 m h maximum load current at v out = 5v input voltage (v) 5 2.6 load current (a) 2.8 3.2 3.4 3.6 9 13 15 4.4 1506 g17 3.0 711 3.8 4.0 4.2 l= 10 m h l= 5 m h l= 3 m h l= 1.8 m h switch voltage drop switch current (a) 0 switch voltage (mv) 250 200 400 125 c 25 c 350 300 45 1506 g16 150 100 50 0 1 2 3 500 450 ?0 c v c pin shutdown threshold junction temperature ( c) ?0 1.4 1.2 1.0 0.8 0.6 0.4 100 1506 g15 25 0 25 50 75 125 threshold voltage (v) shutdown output voltage (%) 0 5 6 7 80 1506 g18 4 3 20 40 60 100 2 1 0 output current (a) foldback characteristics current source load resistor load mos load possible undesired stable point for current source load* current limit foldback kool m m is a registered trademark of magnetics, inc. metglas is a registered trademark of alliedsignal inc. *see more than just voltage feedback in the applications information section.
6 lt1506 pi n fu n ctio n s uuu fb/sense: the feedback pin is used to set output voltage using an external voltage divider that generates 2.42v at the pin with the desired output voltage. the fixed voltage (-3.3) parts have the divider included on the chip and the fb pin is used as a sense pin, connected directly to the 3.3v output. three additional functions are performed by the fb pin. when the pin voltage drops below 1.7v, switch current limit is reduced. below 1.5v the external sync function is disabled. below 1v, switching frequency is also reduced. see feedback pin function section in applica- tions information for details. boost: the boost pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar npn power switch. without this added voltage, the typical switch voltage loss would be about 1.5v. the additional boost voltage allows the switch to saturate and voltage loss approximates that of a 0.07 w fet structure, but with much smaller die area. efficiency improves from 75% for conventional bipolar designs to > 89% for these new parts. v in : this is the collector of the on-chip power npn switch. this pin powers the internal circuitry and internal regula- tor. at npn switch on and off, high di/dt edges occur on this pin. keep the external bypass and catch diode close to this pin. all trace inductance on this path will create a voltage spike at switch off, adding to the v ce voltage across the internal npn. gnd: the gnd pin connection needs consideration for two reasons. first, it acts as the reference for the regulated output, so load regulation will suffer if the ground end of the load is not at the same voltage as the gnd pin of the ic. this condition will occur when load current or other currents flow through metal paths between the gnd pin and the load ground point. keep the ground path short between the gnd pin and the load and use a ground plane when possible. the second consideration is emi caused by gnd pin current spikes. internal capacitance between the v sw pin and the gnd pin creates very narrow (<10ns) current spikes in the gnd pin. if the gnd pin is connected to system ground with a long metal trace, this trace may radiate excess emi. keep the path between the input bypass and the gnd pin short. the gnd pin of the so-8 package is directly attached to the internal tab. this pin should be attached to a large copper area to improve thermal resistance. v sw : the switch pin is the emitter of the on-chip power npn switch. this pin is driven up to the input pin voltage during switch on time. inductor current drives the switch pin negative during switch off time. negative voltage is clamped with the external catch diode. maximum negative switch voltage allowed is C 0.8v. sync: the sync pin is used to synchronize the internal oscillator to an external signal. it is directly logic compat- ible and can be driven with any signal between 10% and 90% duty cycle. the synchronizing range is equal to initial operating frequency, up to 1mhz. this pin replaces shdn on -sync option parts. see synchronizing section in applications information for details. when not in use, this pin should be grounded. shdn: the shutdown pin is used to turn off the regulator and to reduce input drain current to a few microamperes. actually, this pin has two separate thresholds, one at 2.38v to disable switching, and a second at 0.4v to force complete micropower shutdown. the 2.38v threshold functions as an accurate undervoltage lockout (uvlo). this is sometimes used to prevent the regulator from operating until the input votlage has reached a predeter- mined level. v c : the v c pin is the output of the error amplifier and the input of the peak switch current comparator. it is normally used for frequency compensation, but can do double duty as a current clamp or control loop override. this pin sits at about 1v for very light loads and 2v at maximum load. it can be driven to ground to shut off the regulator, but if driven high, current must be limited to 4ma.
7 lt1506 block diagra m w and output capacitor, then an abrupt 180 shift will occur. the current fed system will have 90 phase shift at a much lower frequency, but will not have the additional 90 shift until well beyond the lc resonant frequency. this makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response. high switch efficiency is attained by using the boost pin to provide a voltage to the switch driver which is higher than the input voltage, allowing switch to be saturated. this boosted voltage is generated with an external capaci- tor and diode. two comparators are connected to the shutdown pin. one has a 2.38v threshold for undervoltage lockout and the second has a 0.4v threshold for complete shutdown. the lt1506 is a constant frequency, current mode buck converter. this means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. in addition to the normal error amplifier, there is a current sense amplifier that monitors switch current on a cycle-by-cycle basis. a switch cycle starts with an oscilla- tor pulse which sets the r s flip-flop to turn the switch on. when switch current reaches a level set by the inverting input of the comparator, the flip-flop is reset and the switch turns off. output voltage control is obtained by using the output of the error amplifier to set the switch current trip point. this technique means that the error amplifier commands current to be delivered to the output rather than voltage. a voltage fed system will have low phase shift up to the resonant frequency of the inductor figure 1. block diagram + + s input 2.9v bias regulator 500khz oscillator frequency shift circuit v sw fb v c gnd 1506 bd slope comp 0.01 w internal v cc current sense amplifier voltage gain = 20 sync shdn shutdown comparator lockout comparator current comparator error amplifier g m = 2000 m mho foldback current limit clamp boost r s flip-flop driver circuitry s r 0.9v q2 q1 power switch parasitic diodes do not forward bias 2.42v + 0.4v 3.5 m a 2.38v
8 lt1506 applicatio n s i n for m atio n wu u u feedback pin functions the feedback (fb) pin on the lt1506 is used to set output voltage and provide several overload protection features. the first part of this section deals with selecting resistors to set output voltage and the remaining part talks about foldback frequency and current limiting created by the fb pin. please read both parts before committing to a final design. the fixed 3.3v lt1506-3.3 has internal divider resistors and the fb pin is renamed sense, connected directly to the output. the suggested value for the output divider resistor (see figure 2) from fb to ground (r2) is 5k or less, and a formula for r1 is shown below. the output voltage error caused by ignoring the input bias current on the fb pin is less than 0.25% with r2 = 5k. please read the following if divider resistors are increased above the suggested values. r rv out 1 2242 242 = - () . . more than just voltage feedback the feedback pin is used for more than just output voltage sensing. it also reduces switching frequency and current limit when output voltage is very low (see the frequency foldback graph in typical performance characteristics). this is done to control power dissipation in both the ic and in the external diode and inductor during short-circuit conditions. a shorted output requires the switching regu- lator to operate at very low duty cycles, and the average current through the diode and inductor is equal to the short-circuit current limit of the switch (typically 6a for the lt1506, folding back to less than 3a). minimum switch on time limitations would prevent the switcher from attaining a sufficiently low duty cycle if switching frequency were maintained at 500khz, so frequency is reduced by about 5:1 when the feedback pin voltage drops below 1v (see frequency foldback graph). this does not affect operation with normal load conditions; one simply sees a gear shift in switching frequency during start-up as the output voltage rises. in addition to lower switching frequency, the lt1506 also operates at lower switch current limit when the feedback pin voltage drops below 1.7v. q2 in figure 2 performs this function by clamping the v c pin to a voltage less than its normal 2.1v upper clamp level. this foldback current limit greatly reduces power dissipation in the ic, diode and inductor during short-circuit conditions. external synchro- nization is also disabled to prevent interference with foldback operation. again, it is nearly transparent to the user under normal load conditions. the only loads that may be affected are current source loads which maintain full load current with output voltage less than 50% of final value. in these rare situations the feedback pin can be clamped above 1.5v with an external diode to defeat foldback cur- rent limit. caution: clamping the feedback pin means that frequency shifting will also be defeated, so a combination of high input voltage and dead shorted output may cause the lt1506 to lose control of current limit. figure 2. frequency and current limit foldback + 2.4v v sw v c gnd to sync circuit 1506 f02 to frequency shifting r3 1k r4 1k r1 r2 5k output 5v r5 5k error amplifier fb 1.6v q1 lt1506 q2 +
9 lt1506 applicatio n s i n for m atio n wu u u the internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low. the equivalent circuitry is shown in figure 2. q1 is completely off during normal operation. if the fb pin falls below 1v, q1 begins to conduct current and reduces frequency at the rate of approximately 5khz/ m a. to ensure adequate frequency foldback (under worst-case short-circuit conditions), the external divider thevinin resistance must be low enough to pull 150 m a out of the fb pin with 0.6v on the pin (r div 4k). the net result is that reductions in frequency and current limit are affected by output voltage divider imped- ance. although divider impedance is not critical, caution should be used if resistors are increased beyond the suggested values and short-circuit conditions will occur with high input voltage . high frequency pickup will increase and the protection accorded by frequency and current foldback will decrease. maximum output load current maximum load current for a buck converter is limited by the maximum switch current rating (i p ) of the lt1506. this current rating is 4.5a up to 50% duty cycle (dc), decreasing to 3.7a at 80% duty cycle. this is shown graphically in typical performance characteristics and as shown in the formula below: i p = 4.5a for dc 50% i p = 3.21 + 5.95(dc) C 6.75(dc) 2 for 50% < dc < 90% dc = duty cycle = v out /v in example: with v out = 5v, v in = 8v; dc = 5/8 = 0.625, and; i sw(max) = 3.21 + 5.95(0.625) C 6.75(0.625) 2 = 4.3a current rating decreases with duty cycle because the lt1506 has internal slope compensation to prevent cur- rent mode subharmonic switching. for more details, read application note 19. the lt1506 is a little unusual in this regard because it has nonlinear slope compensation which gives better compensation with less reduction in current limit. maximum load current would be equal to maximum switch current for an infinitely large inductor , but with finite inductor size, maximum load current is reduced by one-half peak-to-peak inductor current. the following formula assumes continuous mode operation, implying that the term on the right is less than one-half of i p . i out(max) = continuous mode for the conditions above and l = 3.3 m h, i a out max ( ) - =- () - () ? ? ? ? ? ? () =- = 43 58 5 2 3 3 10 500 10 8 43 057 373 63 . . .. . at v in = 15v, duty cycle is 33%, so i p is just equal to a fixed 4.5a, and i out(max) is equal to: 45 515 5 2 3 3 10 500 10 15 45 101 349 63 . . .. . - () - () ? ? ? ? ? ? () =- = - a note that there is less load current available at the higher input voltage because inductor ripple current increases. this is not always the case. certain combinations of inductor value and input voltage range may yield lower available load current at the lowest input voltage due to reduced peak switch current at high duty cycles. if load current is close to the maximum available, please check maximum available current at both input voltage ex- tremes. to calculate actual peak switch current with a given set of conditions, use: ii vvv lfv sw peak out out in out in ( ) =+ - () ()()( ) 2 i p - () - () ()()( ) vvv lfv out in out in 2
10 lt1506 applicatio n s i n for m atio n wu u u choosing the inductor and output capacitor for most applications the output inductor will fall in the range of 3 m h to 20 m h. lower values are chosen to reduce physical size of the inductor. higher values allow more output current because they reduce peak current seen by the lt1506 switch, which has a 4.5a limit. higher values also reduce output ripple voltage, and reduce core loss. graphs in the typical performance characteristics section show maximum output load current versus inductor size and input voltage. a second graph shows core loss versus inductor size for various core materials. when choosing an inductor you might have to consider maximum load current, core and copper losses, allowable component height, output voltage ripple, emi, fault cur- rent in the inductor, saturation, and of course, cost. the following procedure is suggested as a way of handling these somewhat complicated and conflicting requirements. 1. choose a value in microhenries from the graphs of maximum load current and core loss. choosing a small inductor with lighter loads may result in discontinuous mode of operation, but the lt1506 is designed to work well in either mode. keep in mind that lower core loss means higher cost, at least for closed core geometries like toroids. the core loss graphs show absolute loss for a 3.3v output, so actual percent losses must be calculated for each situation. assume that the average inductor current is equal to load current and decide whether or not the inductor must withstand continuous fault conditions. if maxi- mum load current is 0.5a, for instance, a 0.5a inductor may not survive a continuous 4.5a overload condition. dead shorts will actually be more gentle on the induc- tor because the lt1506 has foldback current limiting. 2. calculate peak inductor current at full load current to ensure that the inductor will not saturate. peak current can be significantly higher than output current, espe- cially with smaller inductors and lighter loads, so dont omit this step. powdered iron cores are forgiving because they saturate softly, whereas ferrite cores saturate abruptly. other core materials fall in between somewhere. the following formula assumes continu- ous mode of operation, but it errs only slightly on the high side for discontinuous mode, so it can be used for all conditions. ii vvv flv peak out out in out in =+ - () ()( )( ) 2 v in = maximum input voltage f = switching frequency, 500khz 3. decide if the design can tolerate an open core geom- etry like a rod or barrel, which have high magnetic field radiation, or whether it needs a closed core like a toroid to prevent emi problems. one would not want an open core next to a magnetic storage media, for instance! this is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radia- tion will be a problem. 4. start shopping for an inductor (see representative surface mount units in table 2) which meets the requirements of core shape, peak current (to avoid saturation), average current (to limit heating), and fault current (if the inductor gets too hot, wire insulation will melt and cause turn-to-turn shorts). keep in mind that all good things like high efficiency, low profile, and high temperature operation will increase cost, sometimes dramatically. get a quote on the cheapest unit first to calibrate yourself on price, then ask for what you really want. 5. after making an initial choice, consider the secondary things like output voltage ripple, second sourcing, etc. use the experts in the linear technologys applica- tions department if you feel uncertain about the final choice. they have experience with a wide range of inductor types and can tell you about the latest devel- opments in low profile, surface mounting, etc.
11 lt1506 applicatio n s i n for m atio n wu u u table 2 series core vendor/ value dc core resis- mater- height part no. ( m h) (amps) type tance( w ) ial (mm) coiltronics ctx2-1 2 4.1 tor 0.011 km m 4.2 ctx5-4 5 4.4 tor 0.019 km m 6.4 ctx8-4 8 3.5 tor 0.020 km m 6.4 ctx2-1p 2 3.4 tor 0.014 52 4.2 ctx2-3p 2 4.6 tor 0.012 52 4.8 ctx5-4p 5 3.3 tor 0.027 52 6.4 sumida cdrh125 10 4.0 sc 0.025 fer 6 cdrh125 12 3.5 sc 0.027 fer 6 cdrh125 15 3.3 sc 0.030 fer 6 cdrh125 18 3.0 sc 0.034 fer 6 coilcraft dt3316-222 2.2 5 sc 0.035 fer 5.1 dt3316-332 3.3 5 sc 0.040 fer 5.1 dt3316-472 4.7 3 sc 0.045 fer 5.1 pulse pe-53650 4 4.8 tor 0.017 fer 9.1 pe-53651 5 5.4 tor 0.018 fer 9.1 pe-53652 9 5.5 tor 0.022 fer 10 pe-53653 16 5.1 tor 0.032 fer 10 dale ihsm-4825 2.7 5.1 open 0.034 fer 5.6 ihsm-4825 4.7 4.0 open 0.047 fer 5.6 ihsm-5832 10 4.3 open 0.053 fer 7.1 ihsm-5832 15 3.5 open 0.078 fer 7.1 ihsm-7832 22 3.8 open 0.054 fer 7.1 tor = toroid sc = semiclosed geometry fer = ferrite core material 52 = type 52 powdered iron core material km m = kool m m output capacitor the output capacitor is normally chosen by its effective series resistance (esr), because this is what determines output ripple voltage. at 500khz, any polarized capacitor is essentially resistive. to get low esr takes volume , so physically smaller capacitors have high esr. the esr range for typical lt1506 applications is 0.05 w to 0.2 w . a typical output capacitor is an avx type tps, 100 m f at 10v, with a guaranteed esr less than 0.1 w . this is a d size surface mount solid tantalum capacitor. tps capacitors are specially constructed and tested for low esr, so they give the lowest esr for a given volume. the value in microfarads is not particularly critical, and values from 22 m f to greater than 500 m f work well, but you cannot cheat mother nature on esr. if you find a tiny 22 m f solid tantalum capacitor, it will have high esr, and output ripple voltage will be terrible. table 3 shows some typical solid tantalum surface mount capacitors. table 3. surface mount solid tantalum capacitor esr and ripple current e case size esr (max., w ) ripple current (a) avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 avx taj 0.7 to 0.9 0.4 d case size avx tps, sprague 593d 0.1 to 0.3 0.7 to 1.1 c case size avx tps 0.2 (typ) 0.5 (typ) many engineers have heard that solid tantalum capacitors are prone to failure if they undergo high surge currents. this is historically true, and type tps capacitors are specially tested for surge capability, but surge ruggedness is not a critical issue with the output capacitor. solid tantalum capacitors fail during very high turn-on surges, which do not occur at the output of regulators. high discharge surges, such as when the regulator output is dead shorted, do not harm the capacitors. unlike the input capacitor, rms ripple current in the output capacitor is normally low enough that ripple cur- rent rating is not an issue. the current waveform is triangular with a typical value of 200ma rms . the formula to calculate this is: output capacitor ripple current (rms): i vvv lfv ripple rms out in out in ( ) = () - () ()()( ) 029 .
12 lt1506 applicatio n s i n for m atio n wu u u ceramic capacitors higher value, lower cost ceramic capacitors are now available in smaller case sizes. these are ideal for input bypassing because of their high ripple rating and tolerance to turn-on surges. as output capacitors, caution must be used. solid tantalum capacitors esr generates a loop zero at 5khz to 50khz that is beneficial in giving accept- able loop phase margin. ceramic capacitors remain ca- pacitive to beyond 300khz and usually resonate with their esl before esr becomes effective. when using ceramic output capacitors, the loop compensation pole frequency must be reduced by a typical factor of 10. output ripple voltage figure 3 shows a typical output ripple voltage waveform for the lt1506. ripple voltage is determined by the high frequency impedance of the output capacitor, and ripple current through the inductor. peak-to-peak ripple current through the inductor into the output capacitor is: i vvv vlf p out in out in -p = () - () ()()() for high frequency switchers, the sum of ripple current slew rates may also be relevant and can be calculated from: s di dt v l in = peak-to-peak output ripple voltage is the sum of a triwave created by peak-to-peak ripple current times esr, and a square wave created by parasitic inductance (esl) and ripple current slew rate. capacitive reactance is assumed to be small compared to esr or esl. v i esr esl di dt ripple = ()( ) + () p-p s example: with v in =10v, v out = 5v, l = 10 m h, esr = 0.1 w , esl = 10nh: ia di dt va mv ripple p-p p-p = () - () () ? ? ? ? ? ? = == = ()() + ? ? ? ? ? ? =+= - - - 510 5 10 10 10 500 10 05 10 10 10 10 05 01 10 10 10 0 05 0 01 60 63 6 6 96 . .. .. s v out at i out = 1a v out at i out = 50ma inductor current at i out = 1a 0.5 m s/div 1374 f03 inductor current at i out = 50ma 20mv/div 0.5a/div figure 3. lt1506 ripple voltage waveform catch diode the suggested catch diode (d1) is a 1n5821 schottky, or its motorola equivalent, mbr330. it is rated at 3a average forward current and 30v reverse voltage. typical forward voltage is 0.5v at 3a. the diode conducts current only during switch off time. peak reverse voltage is equal to regulator input voltage. average forward current in normal operation can be calculated from: i ivv v d avg out in out in ( ) = - () this formula will not yield values higher than 3a with maximum load current of 4.25a unless the ratio of input to output voltage exceeds 3.4:1. the only reason to consider a larger diode is the worst-case condition of a high input voltage and overloaded (not shorted) output. under short- circuit conditions, foldback current limit will reduce diode current to less than 2.6a, but if the output is overloaded
13 lt1506 applicatio n s i n for m atio n wu u u and does not fall to less than 1/3 of nominal output voltage, foldback will not take effect. with the overloaded condi- tion, output current will increase to a typical value of 5.7a, determined by peak switch current limit of 6a. with v in = 15v, v out = 4v (5v overloaded) and i out = 5.7a: ia d avg () = - () = 5 7 15 4 15 418 . . this is safe for short periods of time, but it would be prudent to check with the diode manufacturer if continu- ous operation under these conditions must be tolerated. boost pin considerations for most applications, the boost components are a 0.27 m f capacitor and a 1n914 or 1n4148 diode. the anode is connected to the regulated output voltage and this gener- ates a voltage across the boost capacitor nearly identical to the regulated output. in certain applications, the anode may instead be connected to the unregulated input volt- age. this could be necessary if the regulated output voltage is very low (< 3v) or if the input voltage is less than 5v. efficiency is not affected by the capacitor value, but the capacitor should have an esr of less than 1 w to ensure that it can be recharged fully under the worst-case condi- tion of minimum input voltage. almost any type of film or ceramic capacitor will work fine. for nearly all applications, a 0.27 m f boost capacitor works just fine, but for the curious, more details are provided here. the size of the boost capacitor is determined by switch drive current requirements. during switch on time, drain current on the capacitor is approximately i out / 50. at peak load current of 4.25a, this gives a total drain of 85ma. capacitor ripple voltage is equal to the product of on time and drain current divided by capacitor value; d v = (t on )(85ma/c). to keep capacitor ripple voltage to less than 0.6v (a slightly arbitrary number) at the worst- case condition of t on = 1.8 m s, the capacitor needs to be 0.27 m f. boost capacitor ripple voltage is not a critical parameter, but if the minimum voltage across the capaci- tor drops to less than 3v, the power switch may not saturate fully and efficiency will drop. an approximate formula for absolute minimum capacitor value is: c ivv fv v min out out in out = ()( ) () - () // . 50 28 f = switching frequency v out = regulated output voltage v in = minimum input voltage this formula can yield capacitor values substantially less than 0.27 m f, but it should be used with caution since it does not take into account secondary factors such as capacitor series resistance, capacitance shift with tem- perature and output overload. shutdown function and undervoltage lockout figure 4 shows how to add undervoltage lockout (uvlo) to the lt1506. typically, ulvo is used in situations where the input supply is current limited , or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. ulvo prevents the regulator from operating at source voltages where these problems might occur. threshold voltage for lockout is about 2.38v, slightly less than the internal 2.42v reference voltage. a 3.5 m a bias current flows out of the pin at threshold. this internally generated current is used to force a default high state on the shutdown pin if the pin is left open. when low shut- down current is not an issue, the error due to this current can be minimized by making r lo 10k or less. if shutdown current is an issue, r lo can be raised to 100k, but the error due to initial bias current and changes with temperature should be considered. rk r rv v vr a lo hi lo in lo = () = - () - () 10 238 238 35 to 100k 25k suggested . ..m v in = minimum input voltage
14 lt1506 applicatio n s i n for m atio n wu u u 2.38v 0.4v gnd v sw lt1506 input r fb r hi 1506 f04 output shdn lockout in total shutdown 3.5 m a r lo c1 + figure 4. undervoltage lockout keep the connections from the resistors to the shutdown pin short and make sure that interplane or surface capaci- tance to the switching nodes are minimized. if high resistor values are used, the shutdown pin should be bypassed with a 1000pf capacitor to prevent coupling problems from the switch node. if hysteresis is desired in the undervoltage lockout point, a resistor r fb can be added to the output node. resistor values can be calcu- lated from: r rv vv v ra rrv v hi lo in out fb hi out = -+ () + [] - () = ()( ) 238 1 238 235 ./ .. / dd d m 25k suggested for r lo v in = input voltage at which switching stops as input voltage descends to trip level d v = hysteresis in input voltage level example: output voltage is 5v, switching is to stop if input voltage drops below 6v and should not restart unless input rises back to 7.5v. d v is therefore 1.5v and v in = 6v. let r lo = 25k. r k ka k k rk k hi fb = -+ () + [] - () = () = = () = 25 6 23815 5 1 15 238 25 35 25 5 2 229 48 48 5 1 5 160 ../ . .. . . /. m switch node considerations for maximum efficiency, switch rise and fall times are made as short as possible. to prevent radiation and high frequency resonance problems, proper layout of the com- ponents connected to the switch node is essential. b field (magnetic) radiation is minimized by keeping catch diode, switch pin, and input bypass capacitor leads as short as possible. e field radiation is kept low by minimizing the length and area of all traces connected to the switch pin and boost pin. a ground plane should always be used under the switcher circuitry to prevent interplane cou- pling. a suggested layout for the critical components is shown in figure 5. note that the feedback resistors and compensation components are kept as far as possible
15 lt1506 applicatio n s i n for m atio n wu u u from the switch node. also note that the high current ground path of the catch diode and input capacitor are kept very short and separate from the analog ground line. the high speed switching current path is shown schemati- cally in figure 6. minimum lead length in this path is essential to ensure clean switching and low emi. the path including the switch, catch diode, and input capacitor is the only one containing nanosecond rise and fall times. if you follow this path on the pc layout, you will see that it is irreducibly short. if you move the diode or input capacitor away from the lt1506, get your resum in order. the other paths contain only some combination of dc and 500khz triwave, so are much less critical. figure 5. suggested layout (topside only shown) figure 6. high speed switching path 1 u1 c1 connect to ground plane keep fb and v c components away from high frequency, high current components place feedthroughs around gnd pin for good thermal conductivity r3 d2 c4 r2 l1 1506 f05 c5 c6 gnd v out d1 c3 v in gnd connect to ground plane minimize lt1506 c3, d1 loop kelvin sense v out take output directly from end of output capacitor 1506 f06 5v l1 v in high frequency circulating path load switch node
16 lt1506 applicatio n s i n for m atio n wu u u parasitic resonance resonance or ringing may sometimes be seen on the switch node (see figure 7). very high frequency ringing following switch rise time is caused by switch/diode/input capacitor lead inductance and diode capacitance. schot- tky diodes have very high q junction capacitance that can ring for many cycles when excited at high frequency. if total lead length for the input capacitor, diode and switch path is 1 inch, the inductance will be approximately 25nh. at switch off, this will produce a spike across the npn output device in addition to the input voltage. at higher currents this spike can be in the order of 10v to 20v or higher with a poor layout, potentially exceeding the abso- lute max switch voltage. the path around switch, catch diode and input capacitor must be kept as short as possible to ensure reliable operation. when looking at this, a >100mhz oscilloscope must be used, and waveforms should be observed on the leads of the package. this switch off spike will also cause the sw node to go below ground. the lt1506 has special circuitry inside which rise and fall waveforms are superimposed (pulse width is not 120ns) 5v/div figure 7. switch node resonance 20ns/div 1375/76 f07 inductor current 20ns/div 1375/76 f11 0.5 m s/div 1375/76 f08 figure 8. discontinuous mode ringing 5v/div 100ma/div switch node voltage mitigates this problem, but negative voltages over 1v lasting longer than 10ns should be avoided. note that 100mhz oscilloscopes are barely fast enough to see the details of the falling edge overshoot in figure 7. a second, much lower frequency ringing is seen during switch off time if load current is low enough to allow the inductor current to fall to zero during part of the switch off time (see figure 8). switch and diode capacitance reso- nate with the inductor to form damped ringing at 1mhz to 10 mhz. this ringing is not harmful to the regulator and it has not been shown to contribute significantly to emi. any attempt to damp it with a resistive snubber will degrade efficiency. input bypassing and voltage range input bypass capacitor step-down converters draw current from the input supply in pulses. the average height of these pulses is equal to load current, and the duty cycle is equal to v out /v in . rise and fall time of the current is very fast. a local bypass capacitor across the input supply is necessary to ensure proper operation of the regulator and minimize the ripple current fed back into the input supply. the capacitor also forces switching current to flow in a tight local loop, minimizing emi . do not cheat on the ripple current rating of the input bypass capacitor, but also dont get hung up on the value in microfarads . the input capacitor is intended to absorb all the switching current ripple, which can have an rms value as high as one half of load current. ripple current ratings on the capacitor must be observed to ensure reliable operation. in many cases it is necessary to parallel two capacitors to obtain the required ripple rating. both capacitors must be of the same value and manufacturer to guarantee power sharing. the actual value of the capacitor in microfarads is not particularly important because at 500khz, any value above 5 m f is essentially resistive. rms ripple current rating is the critical parameter. actual rms current can be calculated from: iivvvv ripple rms out out in out in ( ) =- () / 2
17 lt1506 applicatio n s i n for m atio n wu u u the term inside the radical has a maximum value of 0.5 when input voltage is twice output, and stays near 0.5 for a relatively wide range of input voltages. it is common practice therefore to simply use the worst-case value and assume that rms ripple current is one half of load current. at maximum output current of 4.5a for the lt1506, the input bypass capacitor should be rated at 2.25a ripple current. note however, that there are many secondary considerations in choosing the final ripple current rating. these include ambient temperature, average versus peak load current, equipment operating schedule, and required product lifetime. for more details, see application notes 19 and 46, and design note 95. input capacitor type some caution must be used when selecting the type of capacitor used at the input to regulators. aluminum electrolytics are lowest cost, but are physically large to achieve adequate ripple current rating, and size con- straints (especially height), may preclude their use. ceramic capacitors are now available in larger values, and their high ripple current and voltage rating make them ideal for input bypassing. cost is fairly high and footprint may also be somewhat large. solid tantalum capacitors would be a good choice, except that they have a history of occasional spectacular failures when they are subjected to large current surges during power-up. the capacitors can short and then burn with a brilliant white light and lots of nasty smoke. this phenomenon occurs in only a small percentage of units, but it has led some oem companies to forbid their use in high surge applications. the input bypass capacitor of regulators can see these high surges when a battery or high capacitance source is connected. several manufacturers have developed a line of solid tantalum capacitors specially tested for surge capability (avx tps series for instance, see table 3), but even these units may fail if the input voltage surge approaches the maximum voltage rating of the capacitor. avx recom- mends derating capacitor voltage by 2:1 for high surge applications. larger capacitors may be necessary when the input volt- age is very close to the minimum specified on the data sheet. small voltage dips during switch on time are not normally a problem, but at very low input voltage they may cause erratic operation because the input voltage drops below the minimum specification. problems can also occur if the input-to-output voltage differential is near minimum. the amplitude of these dips is normally a function of capacitor esr and esl because the capacitive reactance is small compared to these terms. esr tends to be the dominate term and is inversely related to physical capacitor size within a given capacitor type. synchronizing (-sync option for dd package) the sync pin, is used to synchronize the internal oscilla- tor to an external signal. the sync input must pass from a logic level low, through the maximum synchronization threshold with a duty cycle between 10% and 90%. the input can be driven directly from a logic level output. the synchronizing range is equal to initial operating frequency up to 1mhz. this means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (560khz), not the typical operating frequency of 500khz. caution should be used when synchronizing above 700khz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. this type of subharmonic switching only occurs at input voltages less than twice output voltage. higher inductor values will tend to eliminate this problem. see frequency compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensation. application note 19 has more details on the theory of slope compensation. at power-up, when v c is being clamped by the fb pin (see figure 2, q2), the sync function is disabled. this allows the frequency foldback to operate in the shorted output con- dition. during normal operation, switching frequency is controlled by the internal oscillator until the fb pin reaches 1.5v, after which the sync pin becomes operational. thermal calculations power dissipation in the lt1506 chip comes from four sources: switch dc loss, switch ac loss, boost circuit current, and input quiescent current. the following
18 lt1506 applicatio n s i n for m atio n wu u u formulas show how to calculate each of these losses. these formulas assume continuous mode operation, so they should not be used for calculating efficiency at light load currents. switch loss: p ri v v ns i v f sw sw out out in out in = ()( ) + ()()() 2 24 boost current loss: p vi v boost out out in = () 2 50 / quiescent current loss: pv v v v q in out out in = () + () + ? ? ? ? () 0 001 0 005 0 002 2 .. . r sw = switch resistance ( ? 0.07) 24ns = equivalent switch current/voltage overlap time f = switch frequency example: with v in = 10v, v out = 5v and i out = 3a: p w pw pw sw boost q = ( )()() + ? ? ? ()( ) ? ? ? =+= = ()( ) = = () + () + ()( ) = - 007 3 5 10 24 10 3 10 500 10 0 32 0 36 0 68 5350 10 015 10 0 001 5 0 005 5 0 002 10 004 2 93 2 2 . ... / . .. . . total power dissipation is 0.68 + 0.15 + 0.04 = 0.87w. thermal resistance for lt1506 package is influenced by the presence of internal or backside planes. with a full plane under the so package, thermal resistance will be about 80 c/w. no plane will increase resistance to about 120 c/w. to calculate die temperature, use the proper thermal resistance number for the desired package and add in worst-case ambient temperature: t j = t a + q ja (p tot ) with the so-8 package ( q ja = 80 c/w), at an ambient temperature of 50 c, t j = 50 + 80 (0.87) = 120 c die temperature is highest at low input voltage, so use lowest continuous input operating voltage for thermal calculations. frequency compensation loop frequency compensation of switching regulators can be a rather complicated problem because the reactive components used to achieve high efficiency also introduce multiple poles into the feedback loop. the inductor and output capacitor on a conventional step- down converter actually form a resonant tank circuit that can exhibit peaking and a rapid 180 phase shift at the resonant frequency. by contrast, the lt1506 uses a cur- rent mode architecture to help alleviate phase shift cre- ated by the inductor. the basic connections are shown in figure 9. figure 10 shows a bode plot of the phase and gain of the power section of the lt1506, measured from the v c pin to the output. gain is set by the 5.3a/v transconduc- tance of the lt1506 power section and the effective complex impedance from output to ground. gain rolls off smoothly above the 600hz pole frequency set by the 100 m f output capacitor. phase drop is limited to about 70 . phase recovers and gain levels off at the zero fre- quency ( ? 16khz) set by capacitor esr (0.1 w ). figure 9. model for loop response + 2.42v v sw v c lt1506 gnd 1506 f09 r1 output esr c f c c r c error amplifier fb r2 c1 current mode power stage g m = 5.3a/v +
19 lt1506 applicatio n s i n for m atio n wu u u figure 10. response from v c pin to output frequency (hz) gain ( m mho) phase (deg) 3000 2500 2000 1500 1000 500 200 150 100 50 0 ?0 100 10k 100k 10m 1506 f11 1k 1m gain phase r out 200k c out 12pf v c error amplifier equivalent circuit r load = 50 w v fb 2 10 ? ) ( figure 11. error amplifier gain and phase figure 12. overall loop characteristics what about a resistor in the compensation network? it is common practice in switching regulator design to add a zero to the error amplifier compensation to increase loop phase margin. this zero is created in the external network in the form of a resistor (r c ) in series with the compensation capacitor. increasing the size of this resis- tor generally creates better and better loop stability, but there are two limitations on its value. first, the combina- tion of output capacitor esr and a large value for r c may cause loop gain to stop rolling off altogether, creating a gain margin problem. an approximate formula for r c where gain margin falls to zero is: r loop v g g esr c out mp ma gain = 1 () = ()()()( ) 242 . frequency (hz) gain: v c pin to output (db) phase: v c pin to output (deg) 40 20 0 ?0 ?0 40 0 ?0 ?0 120 10 1k 10k 1m 1505 f10 100 100k gain phase v in = 10v v out = 5v i out = 2a frequency (hz) loop gain (db) loop phase (deg) 80 60 40 20 0 ?0 200 150 100 50 0 ?0 10 1k 10k 1m 1505 f12 100 100k gain phase v in = 10v v out = 5v, i out = 2a c out = 100 m f, 10v, avx tps c c = 1.5nf, r c = 0, l = 10 m h error amplifier transconductance phase and gain are shown in figure 11. the error amplifier can be modeled as a transconductance of 2000 m mho, with an output imped- ance of 200k w in parallel with 12pf. in all practical applications, the compensation network from v c pin to ground has a much lower impedance than the output impedance of the amplifier at frequencies above 500hz. this means that the error amplifier characteristics them- selves do not contribute excess phase shift to the loop, and the phase/gain characteristics of the error amplifier sec- tion are completely controlled by the external compensa- tion network. in figure 12, full loop phase/gain characteristics are shown with a compensation capacitor of 1.5nf, giving the error amplifier a pole at 530hz, with phase rolling off to 90 and staying there. the overall loop has a gain of 74db at low frequency, rolling off to unity-gain at 100khz. phase shows a two-pole characteristic until the esr of the output capacitor brings it back above 10khz. phase margin is about 60 at unity-gain. analog experts will note that around 4.4khz, phase dips very close to the zero phase margin line. this is typical of switching regulators, especially those that operate over a wide range of loads. this region of low phase is not a problem as long as it does not occur near unity-gain. in practice, the variability of output capacitor esr tends to dominate all other effects with respect to loop response. variations in esr will cause unity-gain to move around, but at the same time phase moves with it so that adequate phase margin is maintained over a very wide range of esr ( 3 3:1).
20 lt1506 applicatio n s i n for m atio n wu u u cases, the resistor may have to be larger to get acceptable phase response, and some means must be used to control ripple voltage at the v c pin. the suggested way to do this is to add a capacitor (c f ) in parallel with the r c /c c network on the v c pin. pole frequency for this capacitor is typically set at one-fifth of switching frequency so that it provides significant attenuation of switching ripple, but does not add unacceptable phase shift at loop unity-gain frequency. with r c = 3k, c fr k pf f c = ()()() = ? ? ? () = 5 2 5 2 500 10 3 531 3 p p how do i test loop stability? the standard compensation for lt1506 is a 1.5nf capacitor for c c , with r c = 0. while this compensation will work for most applications, the optimum value for loop compensation components depends, to various extent, on parameters which are not well controlled. these include inductor value ( 30% due to production tolerance, load current and ripple current variations), output capacitance ( 20% to 50% due to production tolerance, tempera- ture, aging and changes at the load), output capacitor esr ( 200% due to production tolerance, temperature and aging), and finally, dc input voltage and output load current . this makes it important for the designer to check out the final design to ensure that it is robust and tolerant of all these variations. i check switching regulator loop stability by pulse loading the regulator output while observing transient response at the output, using the circuit shown in figure 13. the regulator loop is hit with a small transient ac load current at a relatively low frequency, 50hz to 1khz. this causes the output to jump a few millivolts, then settle back to the original value, as shown in figure 14. a well behaved loop will settle back cleanly, whereas a loop with poor phase or gain margin will ring as it settles. the number of rings indicates the degree of stability, and the frequency of the ringing shows the approximate unity-gain fre- quency of the loop. amplitude of the signal is not particu- larly important, as long as the amplitude is not so high that the loop behaves nonlinearly. g mp = transconductance of power stage = 5.3a/v g ma = error amplifier transconductance = 2(10 C3 ) esr = output capacitor esr 2.42 = reference voltage with v out = 5v and esr = 0.03 w , a value of 6.5k for r c would yield zero gain margin, so this represents an upper limit. there is a second limitation however which has nothing to do with theoretical small signal dynamics. this resistor sets high frequency gain of the error amplifier, including the gain at the switching frequency. if switching frequency gain is high enough, output ripple voltage will appear at the v c pin with enough amplitude to muck up proper operation of the regulator. in the marginal case, subharmonic switching occurs, as evidenced by alternat- ing pulse widths seen at the switch node. in more severe cases, the regulator squeals or hisses audibly even though the output voltage is still roughly correct. none of this will show on a theoretical bode plot because bode is an amplitude insensitive analysis. tests have shown that if ripple voltage on the v c is held to less than 100mv p-p , the lt1506 will be well behaved . the formula below will give an estimate of v c ripple voltage when r c is added to the loop, assuming that r c is large compared to the reactance of c c at 500khz. v r g v v esr vlf c ripple c ma in out in ( ) = ()( ) - ()()() ()()() 24 . g ma = error amplifier transconductance (2000 m mho) if a computer simulation of the lt1506 showed that a series compensation resistor of 3k gave best overall loop response, with adequate gain margin, the resulting v c pin ripple voltage with v in = 10v, v out = 5v, esr = 0.1 w , l = 10 m h, would be: v k v c ripple ( ) - - = () ? ? ? - ()()() () ? ? ? ? ? ? = 3 2 10 10 5 0 1 2 4 10 10 10 500 10 0 144 3 63 .. . this ripple voltage is high enough to possibly create subharmonic switching. in most situations a compromise value (< 2k in this case) for the resistor gives acceptable phase margin and no subharmonic problems. in other
21 lt1506 applicatio n s i n for m atio n wu u u figure 13. loop stability test circuit to oscilloscope sync adjustable dc load adjustable input supply 100hz to 1khz 100mv to 1v p-p 100 m f to 1000 m f ripple filter 1506 f13 to x1 oscilloscope probe 3300pf 330pf 50 w 470 w 4.7k switching regulator + 0.2ms/div 1375/76 f14 10mv/div v out at i out = 500ma before filter v out at i out = 500ma after filter v out at i out = 50ma after filter load pulse through 50 w f ? 780hz 5a/div figure 14. loop stability check the output of the regulator contains both the desired low frequency transient information and a reasonable amount of high frequency (500khz) ripple. the ripple makes it difficult to observe the small transient, so a two-pole, 100khz filter has been added. this filter is not particularly critical; even if it attenuated the transient signal slightly, this wouldnt matter because amplitude is not critical. after verifying that the setup is working correctly, i start varying load current and input voltage to see if i can find any combination that makes the transient response look suspiciously ringy. this procedure may lead to an adjustment for best loop stability or faster loop transient response. nearly always you will find that loop response looks better if you add in several k w for r c . do this only if necessary, because as explained before, r c above 1k may require the addition of c f to control v c pin ripple. if everything looks ok, i use a heat gun and cold spray on the circuit (especially the output capacitor) to bring out any temperature-dependent characteristics. keep in mind that this procedure does not take initial component tolerance into account. you should see fairly clean response under all load and line conditions to ensure that component variations will not cause problems. one note here: according to murphy, the component most likely to be changed in production is the output capacitor, because that is the component most likely to have manu- facturer variations (in esr) large enough to cause prob- lems. it would be a wise move to lock down the sources of the output capacitor in production. a possible exception to the clean response rule is at very light loads, as evidenced in figure 14 with i load = 50ma. switching regulators tend to have dramatic shifts in loop response at very light loads, mostly because the inductor current becomes discontinuous. one common result is very slow but stable characteristics. a second possibility is low phase margin, as evidenced by ringing at the output with transients. the good news is that the low phase margin at light loads is not particularly sensitive to component varia- tion, so if it looks reasonable under a transient test, it will probably not be a problem in production. note that fre- quency of the light load ringing may vary with component tolerance but phase margin generally hangs in there. current sharing multiphase supply the circuit in figure 15 uses multiple lt1506s to produce a 5v, 12a power supply. there are several advantages to using a multiple switcher approach compared to a single larger switcher. the inductor size is considerably reduced. three 4a inductors store less energy (li 2 /2) than one 12a coil so are far smaller. in addition, synchronizing three
22 lt1506 applicatio n s i n for m atio n wu u u converters 120 out of phase with each other reduces input and output ripple currents. this reduces the ripple rating, size and cost of filter capacitors. current sharing/split input supplies current sharing is accomplished by joining the v c pins to a common compensation capacitor. the output of the error amplifier is a gm stage, so any number of devices can be connected together. the effective gm of the composite error amplifier is the multiple of the individual devices. in figure 15, the compensation capacitor c4 has been increased by 3. tolerances in the reference voltages result in small offset currents to flow between the v c pins. the overall effect is that the loop regulates the output at a voltage between the minimum and maximum reference of the devices used. switch current matching between devices will be typically better than 300ma. the negative temperature coefficient of the v c to switch current transcon- ductance prevents current hogging. a common v c voltage forces each lt1506 to operate at the same switch current, not duty cycle. each device operates at the duty cycle defined by its respective input voltage. in figure 15, the input could be split and each device oper- ated at a different voltage. the common v c ensures loading is shared between inputs. figure 15. current sharing 12a supply + + c4 68nf 25v c1, c3: marcon thcs50e1e106z d1: rohm rb051l-40 d2: 1n914 l1: do3316p-682 + c3c 10 m f 25v c2c 330nf 10v d1c d2c 1506 f15 l1c 6.8 m h + c1 10 m f 25v 5v 12a r1 5.36k 1% r2 4.99k 1% 1.8mhz 3-bit ring counter + + c3b 10 m f 25v c2b 330nf 10v d1b d2b l1b 6.8 m h + + c3a 10 m f 25v input 6v to 15v c2a 330nf 10v d1a d2a l1a 6.8 m h v c sync sw gnd lt1506-sync v in boost fb v c sync sw gnd lt1506-sync v in boost fb v c sync sw gnd lt1506-sync v in boost fb synchronized ripple currents a ring counter generates three synchronization signals at 600khz, 33% duty cycle phased 120 apart. the sync input will operate over a wide range of duty cycles, so no further pulse conditioning is needed. each devices maxi- mum input ripple current is a 4a square wave at 600khz. when synchronously added together, the ripple remains at 4a but frequency increases to 1.8mhz. likewise, the output ripple current is a 1.8mhz triangular waveform, with maximum amplitude of 350ma at 10v v in . interest- ingly, at 7.6v and 15v v in , the theoretical summed output ripple current cancels completely. to reduce board space and ripple voltage, c1 and c3 are ceramic capacitors. loop compensation c4 must be adjusted when using ceramic output capacitors due to the lack of effective series resis- tance. the typical tantalum compensation of 1.5nf is increased to 22nf ( 3) for the ceramic output capacitor. if synchronization is not used and the internal oscillators free run, the circuit will operate correctly, but ripple cancellation will not occur. input and output capacitors must be ripple rated for the total output current.
23 lt1506 applicatio n s i n for m atio n wu u u redundant operation the circuit shown in figure 15 is fault tolerant when operating at less than 8a of output current. if one device fails, the output will remain in regulation. the feedback loop will compensate by raising the voltage on the v c pin, increasing switch current of the two remaining devices. buck converter with adjustable soft start large capacitive loads can cause high input currents at start-up. figure 16 shows a circuit that limits the dv/dt of the output at start-up, controlling the capacitor charge rate. the buck converter is a typical configuration with the addition of r3, r4, c ss and q1. as the output starts to rise, q1 turns on, regulating switch current via the v c pin to maintain a constant dv/dt at the output. output rise time is controlled by the current through c ss defined by r4 and q1s v be . once the output is in regulation, q1 turns off and the circuit operates normally. r3 is transient protection for the base of q1. risetime rc v v ss out be = ()( )( ) () 4 using the values shown in figure 16, risetime ms == ( )( )() . 47 10 15 10 5 07 5 39 the ramp is linear and rise times in the order of 100ms are possible. since the circuit is voltage controlled, the ramp rate is unaffected by load characteristics and maximum output current is unchanged. variants of this circuit can be used for sequencing multiple regulator outputs. dual output sepic converter the circuit in figure 17 generates both positive and negative 5v outputs with a single piece of magnetics. the two inductors shown are actually just two windings on a standard b h electronics inductor. the topology for the 5v output is a standard buck converter. the C 5v topology would be a simple flyback winding coupled to the buck converter if c4 were not present. c4 creates a sepic (single-ended primary inductance converter) topology whicn improves regulation and reduces ripple current in l1. without c4, the voltage swing on l1b compared to l1a would vary due to relative loading and coupling losses. c4 provides a low impedance path to maintain an equal voltage swing in l1b, improving regulation. in a flyback converter, during switch on time, all the converters energy is stroed in l1a only, since no current flows in l1b. at switch off, energy is transferred by magnetic coupling into l1b, powering the C 5v rail. c4 pulls l1b positive during switch on time, causing current to flow, and energy to build in l1b and c4. at switch off, the energy stored in both l1b and c4 supply the C5v rail. this reduces the current in l1a and changes l1b current waveform from square to triangular. for details on this circuit see design note 100. figure 16. buck converter with adjustable soft start output 5v output ?v ? * l1 is a single core with two windings bh electronics #501-0726 ** tokin ie475zy5u-c304 ? if load can go to zero, an optional preload of 1k to 5k may be used to improve load regulation d1, d3: mbrd340 input 6v to 15v gnd 1506 f17 c2 0.27 m f c c 1.5nf d1 c1** 100 m f 10v tant c5** 100 m f 10v tant c3 10 m f 25v ceramic c4** 4.7 f d2 1n914 d3 l1* 6.8 m h l1* r1 5.36k r2 4.99k + + + + boost lt1506 v in v sw fb shdn gnd v c boost lt1506 v in output 5v 4a input 12v 1506 f16 c2 0.33 m f c1 100 m f c ss 15nf c c 1.5nf d1 c3 10 m f d2 1n914 l1 5 m h r1 5.36k r3 2k v sw fb shdn gnd v c + r2 4.99k r4 47k q1 figure 17. dual output sepic converter information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
24 lt1506 1506f lt/tp 1198 4k ? printed in usa ? linear technology corporation 1998 dimensions in inches (millimeters) unless otherwise noted. package descriptio n u related parts part number description comments lt1074/lt1076 step-down switching regulators 40v input, 100khz, 5a and 2a ltc ? 1148 high efficiency synchronous step-down switching regulator external fet switches ltc1149 high efficiency synchronous step-down switching regulator external fet switches ltc1174 high efficiency step-down and inverting dc/dc converter 0.5a, 150khz burst mode tm operation lt1176 step-down switching regulator pdip lt1076 lt1370 high efficiency dc/dc converter 42v, 6a, 500khz switch lt1371 high efficiency dc/dc converter 35v, 3a, 500khz switch lt1372/lt1377 500khz and 1mhz high efficiency 1.5a switching regulators boost topology lt1374 high efficiency step-down switching regulator 25v, 4.5a, 500khz switch lt1435/lt1436 high efficiency step-down converter external switches, low noise burst mode is a trademark of linear technology corporation. r package 7-lead plastic dd pak (ltc dwg # 05-08-1462) r (dd7) 0396 0.026 ?0.036 (0.660 ?0.914) 0.143 +0.012 0.020 () 3.632 +0.305 0.508 0.040 ?0.060 (1.016 ?1.524) 0.013 ?0.023 (0.330 ?0.584) 0.095 ?0.115 (2.413 ?2.921) 0.004 +0.008 0.004 () 0.102 +0.203 0.102 0.050 0.012 (1.270 0.305) 0.059 (1.499) typ 0.045 ?0.055 (1.143 ?1.397) 0.165 ?0.180 (4.191 ?4.572) 0.330 ?0.370 (8.382 ?9.398) 0.060 (1.524) typ 0.390 ?0.415 (9.906 ?10.541) 15 typ 0.300 (7.620) 0.075 (1.905) 0.183 (4.648) 0.060 (1.524) 0.060 (1.524) 0.256 (6.502) bottom view of dd pak hatched area is solder plated copper heat sink 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com

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